The present disclosure relates to processing blocks for performing functions such as digital signal processing. In particular, the present disclosure relates to methods and systems for providing enhanced processing blocks used to perform multiplication.
A processing block, such as a digital signal processing (DSP) block, is a block of circuitry, that may be separate from the general-purpose programmable logic of a device on which it is implemented. The processing block may be at least partially hard-wired to perform a specific function such as calculating a mathematical function. The processing block may also be partially programmable to perform a specific function such as calculating a mathematical function. The processing block may be part of an integrated circuit.
Some DSP applications may require processing blocks to support certain operations, such as computing a double precision (e.g., 64 bit long) product of two double precision numbers. For example, the MATH.H library used in the C/C++ programming languages requires compliant systems to support of double precision multiplication. Additionally, the ADSPB and OpenCL standards require MATH.H, and thus require compliant systems to support for double precision multiplication. The IEEE 754 standard also requires support of requiring compliant systems to support double precision multiplication. Implementation of double precision multipliers compliant with the above standards may require utilization of a high number of DSP processing blocks.